1. Field of the Invention
This invention relates generally to DC to DC and DC to AC power converters and, more particularly, to those converters employing regulation through use of pulse width modulation to the current pulses of the inverter sections of such converters.
2. Description of the Prior Art
In DC/AC and DC/DC converters, a common prior art problem is that of providing a fast responding current limit function which protects the converter components, particularly semiconductor devices, from the effects of static and transient overloads at the converter output terminals. A second problem frequently encountered in the prior art is that of maintaining static and transient current balance between the alternately switched devices which convert the DC input to an alternating power waveform. Such switching devices are the major components of what is commonly referred to as the inverter stage of the converter. A third problem in the prior art is one encountered when multiple power converter stages are connected in parallel to supply higher power to a common load. For this case, the current balance among converter stages has not been easy to maintain without the use of complex and slow responding balance circuits.
In converters utilizing transistors as the switching means in their inverter stages, the above problems can cause catastrophic failures in devices, or result in reduced long term converter operating reliability.
Many typical prior art converters operate on the principle of sampling the current at the converter output, rectifying and filtering the current sample, and comparing the resultant signal with a DC reference level. The resultant error signal is amplified and used to control the pulse width of the inverter switching transistor base drive. These techniques are well known, and variations of the approach are found, for example, in U.S. Pat. Nos. such as 3,297,936 -- Ruch, 3,660,749 -- Kadri, and 3,701,937 -- Combs.
Generally, in order to maintain dynamic feedback stability in the current limit modes of such prior art devices, the response time of the feedback error amplifier must be slowed down, or the filters in the feedback path must be designed with low cut-off frequencies. The resultant delays in the feedback path provide slow responding current limit action. Additionally, such prior art circuits do nothing to maintain current balance between the collector currents of the inverter switching devices.
It is well known that in converters utilizing power switching transistors for alternately driving a transformer, very small differences in delays and switching times in the pulse width control circuitry or in the switching characteristics of the inverter switching devices can produce significant differences in the peak collector currents of the inverter switching transistors. Such an imbalance in peak collector current has two effects. First, the stresses on the switching elements become unbalanced. Second, the differential current results in a net DC magnetization of the converter's output transformer core which, in turn, can cause core saturation. Such core saturation, in turn, can lead to the highly unstable condition of still more imbalance in collector current.
Some prior art approaches, such as found in U.S. Pat. No. 3,870,943 -- Weischedel, have attacked the problem of current balance but still exhibit relatively slow speed and complex pulse width control circuitry.
Another approach to the current balance problem involves buying of matched pairs of power switching devices. Such an approach is usually unattractive due to the higher cost, stocking problems, and field replacement problems involved. Additionally, even with matched inverter switching devices, the problem of imbalances in their base drive control circuits could still exist.